Pad part of semiconductor device having optimal capacitance...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead

Reexamination Certificate

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Details

C257SE23020, C257S784000, C257S774000, C257S532000, C257S728000, C257S758000, C257SE27132

Reexamination Certificate

active

07663233

ABSTRACT:
A pad part of a semiconductor device includes a semiconductor substrate having a pad forming region; a plurality of dot type stack patterns with a dielectric layer and a conductive layer for option capacitors, formed in the pad forming region and arranged at regular intervals; a first interlayer dielectric formed on the semiconductor substrate to cover the stack patterns; first metal lines formed on the first interlayer dielectric to be connected to the stack patterns arranged in diagonal directions; a second interlayer dielectric formed on the first interlayer dielectric to cover the first metal lines; second metal lines formed on the second interlayer dielectric to be brought into contact with the first metal lines; a pad formed on the second interlayer dielectric; and option metal lines formed on the second interlayer dielectric to connect the second metal lines and the pad to each other.

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