Scheduling method for automatically developing hardware patterns

Details Scheduling method for automatically developing hardware patterns Scheduling method for automatically developing hardware patterns

1995-12-12

1996-09-17

Kriess, Kevin A.

Boots, shoes, and leggings

3642816, 3642818, 3642613, 3642624, 364938, 395375, G06F 944

Patent

active

055577970

ABSTRACT:
A scheduling method for scheduling a program comprises the steps of: extracting a plurality of traces from a given program such that each of the traces contains a plurality of program blocks executed sequentially, each of the plurality of program blocks containing one or more operators to be executed by arithmetic units of a computer and being separated from another program block in the trace by a branching step that causes a branching to or from a program block outside of the trace; extracting, in each of the plurality of traces, a critical path of the operation conducted by the operators in the trace, the critical path being formed of a plurality of reference operators, the rest of the operators forming movable operators that are conducted concurrently with one or more of the reference operators; and scheduling, in each of the traces, the processing steps of the movable operators such that the maximum of the number of the movable operators conducted concurrently to a reference operator in a given trace, is minimized.

REFERENCES:
Hwang et al, Constrained Conditional Resource Sharing in Pipeline Synthesis, CAD, 1988 International Conf., 1988, pp. 52-55.
Kim et al, A Scheduling Algorithm for Conditional Resource Sharing, CAD, 1991 International Conf. pp. 84-87.
Parker et al, MAHA: A Program for Datapath Synthesis, 23rd Design Automation Conference, 1986, pp. 461-466.
Paulin et al, Force-Directed Scheduling for the Behavioral Synthesis of ASIC's, IEEE Transactions on CAD vol. 8 No. 6 Jun. 1989.
Rewini et al, Scheduling Task Graphs Containing Branches on Parallel Systems, System Sciences, 1991 Annual Hawai Int. Conf. pp. 448-457.
McFarland, et al., "Tutorial on High-Level Synthesis," 25th ACM/IEEE Design Conference, Paper 23.1, pp. 330-336, 1988 IEEE.
McFarland, et al., "The High-Level Synthesis of Digital Systems," Proceedings of the IEEE, vol. 78, No. 2, pp. 301-318, Feb. 1990.

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