Method and circuit arrangement for reducing RFI interface

Details Method and circuit arrangement for reducing RFI interface Method and circuit arrangement for reducing RFI interface

2005-09-30

2010-10-12

Payne, David C (Department: 2611)

Pulse or digital communications

Receivers

C375S295000, C455S012100, C455S011100, C455S003020

Reexamination Certificate

active

07813450

ABSTRACT:
In a method for reducing RFI interference in a DMT data transmission a compensation signal for the purpose of reducing an RFI interference signal superposed on a transmitted DMT reception signal is generated. Only carrier frequencies of the DMT reception signal in the vicinity of the interference frequency of the interference signal which are not utilized for the data transmission are used, at least one normalized complex spectral function for all the carriers of said interference signal is provided, an FFT for the purpose of obtaining spectral values of said DMT reception signal is carried out, and an observation window to a current DMT frame of the DMT reception signal is assigned. A complex evaluating coefficient for the current DMT frame is calculated and the complex evaluating coefficient resulting from the spectral values of said DMT reception signal within the observation window and the complex evaluating coefficient are identical for all frequencies within the current DMT frame. The compensation signal is calculated by multiplying the normalized complex spectral function with the complex evaluating coefficient.

REFERENCES:
patent: 5995567 (1999-11-01), Cioffi et al.
patent: 6014412 (2000-01-01), Wiese et al.
patent: 6035000 (2000-03-01), Bingham
patent: 6400781 (2002-06-01), Vandendorpe et al.
patent: 6404830 (2002-06-01), Wiese et al.
patent: 6449324 (2002-09-01), Wiese et al.
patent: 6456673 (2002-09-01), Wiese et al.
patent: 6535552 (2003-03-01), Pessoa
patent: 6563841 (2003-05-01), Nedic et al.
patent: 6738440 (2004-05-01), Isaksson et al.
patent: 6931292 (2005-08-01), Brumitt et al.
patent: 2001/0026602 (2001-10-01), Wiese et al.
patent: 2001/0028692 (2001-10-01), Wiese et al.
patent: 2002/0123321 (2002-09-01), Antoine et al.
patent: 2002/0186799 (2002-12-01), Sayeed
patent: 2005/0008085 (2005-01-01), Lee et al.
patent: 2005/0063487 (2005-03-01), Sayegh
patent: 2009/0296800 (2009-12-01), Tseng et al.
patent: 697 14 241 (2003-02-01), None
patent: 698 11 716 (2003-12-01), None
patent: WO 03/039088 (2003-05-01), None
Nilsson, Rickard, et al. “A Narrow-band Interference Canceller for OFDM-based Systems.”Proceedings of 4th European Personal Mobile Communications Conference. Vienna: Feb. 17-22, 2001.
Fanucci, L., “VLSI Design of a Digital RFI Cancellation Scheme for VDSL Transceivers”, Euromicro Symposium on Digital System Design 2004, pp. 182-189, (8 pages).
Schwarz et al., “Detection and Compensation of Narrowband Interference for Wireline Multi-Carrier Modulator Systems”, First International Symposium on Control, Communications and Signal Processing 2004, pp. 377-390, (4 pages).

Affiliated with

Also associated with

Rating

Method and circuit arrangement for reducing RFI interface does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method and circuit arrangement for reducing RFI interface, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and circuit arrangement for reducing RFI interface will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4218900