Integrated circuit data processor including a control pin for de

Details Integrated circuit data processor including a control pin for de Integrated circuit data processor including a control pin for de

1993-09-08

1996-09-17

Chan, Eddie P.

Boots, shoes, and leggings

395445, 3642386, 364240, 36424292, 36423441, 364DIG1, G06F 1320

Patent

active

055577601

ABSTRACT:
A processor for use in a data processing system with a cache RAM and main memory has a control pin for deactivating the driving of the data bus without deactivating that of the address bus during a write cycle. This capability is useful during a cache storing operation following a miss for performing a write operation without the requirement of additional address storing circuitry. In particular, during a cache storing operation, the processor can drive the address bus while control of the data bus by the processor is floated. Then, the data in main memory can be put on the data bus and transferred into the cache memory. Once the data is transferred to the cache memory, the original write operation can be completed.

REFERENCES:
patent: 4539652 (1985-09-01), Rubin
patent: 4837461 (1989-06-01), Kubosawa et al.
patent: 5088023 (1992-02-01), Nakamura et al.
patent: 5349666 (1994-09-01), Adachi et al.
patent: 5375209 (1994-12-01), Maher et al.
INTEL Corp. manual, "i486 TM Microprocessor", 1989, pp. 1-125.

Affiliated with

Also associated with

Rating

Integrated circuit data processor including a control pin for de does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit data processor including a control pin for de, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit data processor including a control pin for de will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-421712