Power distribution pattern for a ball grid array

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead

Reexamination Certificate

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C257S778000, C257S786000

Reexamination Certificate

active

07821118

ABSTRACT:
A reduced inductance power distribution pattern for an integrated circuit (IC) package is disclosed. The IC package can include a die in which the electronic circuitry is formed, a ball grid array (BGA) substrate, and a plurality of conductive balls coupled to the BGA substrate. The IC package can further include a plurality of conductive trace rings routed in parallel, and a plurality of bond wires for coupling the die to the conductive balls via the conductive trace rings.

REFERENCES:
patent: 5801440 (1998-09-01), Chu et al.
patent: 6137168 (2000-10-01), Kirkman
patent: 6476472 (2002-11-01), Davison et al.
patent: 2004/0238939 (2004-12-01), Wu

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