Packet communication device, packet communication system,...

Electrical computers and digital processing systems: multicomput – Computer-to-computer protocol implementing – Computer-to-computer data transfer regulating

Reexamination Certificate

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C709S232000, C709S234000, C370S429000, C370S428000

Reexamination Certificate

active

07814223

ABSTRACT:
A transmit packet generated by a CPU1is held in a buffer100a(100b). From among packets received from Ethernet820a(820b), a packet, a destination of which is a communication device800, is held in the buffer100a(100b). A packet which should be transmitted is transmitted from a transfer judging circuit200to Ethernet820aor820bthrough a MAC unit300aor300b. If a transfer judging circuit200judges a packet from the Ethernet820ato be a packet, a destination of which is another communication device, with reference to a destination MAC address, this packet is transferred to the Ethernet820bthrough MAC300b. If a usage rate of a transferring FIFO buffer130a(130b) exceeds a threshold value in the process of transmitting a packet held in a transmitting FIFO buffer120a(130b) on a priority basis, the priority order of a transfer packet is made higher than that of a transmit packet so that the transfer packet is transferred to the Ethernet820aor820bin preference to the transmit packet. This prevents a transfer buffer means from overflowing.

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“Priority-baed ATM Network Congestion Control”, by Yang Hui, et al., Journal of Jinzhou Normal College (National Science Edition), Mar. 1999.
IEEE, 802.1Q-1998 IEEE Standards for Local and Metroplian Area Networks: Virtual Bridged Local Area Networks 1998, 8. Principles of Operatoin, pp. 23-40.

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