Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2007-11-21

2010-06-29

Ghyka, Alexander G (Department: 2812)

Active solid-state devices (e.g., transistors, solid-state diode

Responsive to non-electrical signal

Magnetic field

C257S295000, C257SE29323, C365S066000, C365S158000

Reexamination Certificate

active

07745894

ABSTRACT:
A semiconductor memory device includes first to third wiring layers formed above a semiconductor substrate, extending in a first direction, and sequentially arranged in a second direction perpendicular to the first direction, a plurality of active areas formed in the semiconductor substrate, and extending in a direction oblique to the first direction, first and second selection transistors formed in each of the active areas, and sharing a source region electrically connected to the second wiring layer, a first magnetoresistive element having one terminal electrically connected to a drain region of the first selection transistor, and the other terminal electrically connected to the first wiring layer, and a second magnetoresistive element having one terminal electrically connected to a drain region of the second selection transistor, and the other terminal electrically connected to the third wiring layer.

REFERENCES:
patent: 6172898 (2001-01-01), Kajiyama
patent: 6271081 (2001-08-01), Kajiyama
patent: 7091539 (2006-08-01), Asao
patent: 7142447 (2006-11-01), Ueda et al.
patent: 7272035 (2007-09-01), Chen et al.
patent: 2004/0100835 (2004-05-01), Sugibayashi et al.
patent: 2005/0073897 (2005-04-01), Miyatake et al.
patent: 2006/0220084 (2006-10-01), Umehara et al.
patent: 2003-218326 (2003-07-01), None

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