Semiconductor memory device

Details Semiconductor memory device Semiconductor memory device

2008-07-25

2010-10-26

Pham, Ly D (Department: 2827)

Static information storage and retrieval

Interconnection arrangements

C365S051000

Reexamination Certificate

active

07821805

ABSTRACT:
To secure a sufficient read-out voltage even when lines are arranged at a fine pitch, a semiconductor memory device including: a memory array in which a plurality of memory cells are arranged in rows and columns; and a plurality of bit lines associated with the respective columns of the memory cells is provided. The bit lines include main bit lines and sub bit lines to have a hierarchical structure, the main bit lines are divided among a plurality of interconnection layers, and a distance between the main bit lines in one of the interconnection layers is larger than a distance between the sub bit lines.

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