Method and apparatus for delay and combining circuitry

Details Method and apparatus for delay and combining circuitry Method and apparatus for delay and combining circuitry

2008-06-24

2010-06-08

Mai, Lam T (Department: 2819)

Coded data generation or conversion

Sample and hold

C341S118000

Reexamination Certificate

active

07733252

ABSTRACT:
A system for signal processing is provided. A sampling delay system generates a plurality of sampling delay values. A plurality of programmable delays each receives one of the sample delay values. A plurality of sample and hold units, each coupled to one of the programmable delays, generates a sample of a received signal in response to an input from the programmable delay.

REFERENCES:
patent: 5883822 (1999-03-01), Le Tourneur et al.
patent: 6126602 (2000-10-01), Savord et al.

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