Multiplex communications – Wide area network – Packet switching
Patent
1995-04-14
1996-09-17
Hsu, Alpus H.
Multiplex communications
Wide area network
Packet switching
H04L 1256
Patent
active
055576109
ABSTRACT:
A cell switch fabric chip is provided for use in different arrangements of fabric interfacing a cell body memory to N input ports and N output ports. Each port has a plurality of lines over which constituent bits of a cell body can be transferred by a succession of bit shifts. The chip includes M externally-accessible, separate memory buses each with an associated plurality S of shift register blocks. Each shift register block has an input shift register of L elements into which bits can be shifted from an input port line, the input shift register being connected to said input contact to enable bits to be shifted into the register, and an output shift register of L elements out of which bits can be shifted through an output port line. The input shift register can transfer its contents in a parallel transfer onto the associated bus and, similarly, the output shift register can be loaded by a parallel transfer from the bus. The chip can handle BM sets of port lines where B is the integer part of the result of the division S/N and where each set includes all corresponding lines taken one from each of the N input and N output ports. Thus, for example, if M=2 and S=8, the chip can be used for switch fabric arrangements with 1, 2, 4 or 8 ports to handle 16, 8, 4, or 2 sets of port lines.
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IEEE International Solid-State Circuits Conference, vol. 34, Feb. 1991, New York US, S. Tanaka et al. `A 400 Mbit/s 8*8 BiCMOS ATM switch LSI with 128kB on-chip shared memory` pp. 242, 243, 321 *the whole document*.
International Conference On Communications, vol. 2, Jun. 1991 N.Y. USA pp. 711-715, T. Kozaki et al. `32*32 shared buffer type AM switch VLSIs for B-ISDN` *paragraph 3.1*.
Banks David
Calamvokis Costas
Hewlett--Packard Company
Hsu Alpus H.
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