Semiconductor nonvolatile ram having E2PROM with a floating gate

Static information storage and retrieval – Floating gate – Particular connection

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365228, 257298, 257306, 257316, 257321, G11C 1400

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active

055575668

ABSTRACT:
A semiconductor nonvolatile RAM having a dynamic RAM cell and an E.sup.2 PROM cell. The dynamic RAM cell includes a first transistor having a current path having one end connected to a bit line and a gate connected to a word line. A storage region is connected to another end of the current path. The E.sup.2 PROM cell includes a second transistor including a source region, a drain region, a channel region having first and second parts between the source and drain regions, a floating gate above the first part of the channel region and the source region, and a control gate. The drain of the second transistor is connected to the another end of the current path of the first transistor. Another end of the storage region is above the second part of the channel region and the floating gate. The channel region of the second transistor is rendered conductive in accordance with data stored in the storage region of the dynamic RAM cell.

REFERENCES:
patent: 4998220 (1991-03-01), Eitan et al.
patent: 5063425 (1991-11-01), Yamauchi et al.
patent: 5065201 (1991-11-01), Yamauchi
patent: 5251171 (1993-10-01), Yamauchi
A Novel NVRAM Cell Technology for High Density Applications, Yamauchi et al., IEDM 88, pp. 416-419.
A Versatile Stacked Storage Capacitor On Flotox Cell For Megabit NVRAM Applications, Yamauchi et al., IEDM 89, pp. 595-598.

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