Dynamically-driven deep n-well circuit

Details Dynamically-driven deep n-well circuit Dynamically-driven deep n-well circuit

2008-07-02

2010-11-09

Tra, Quan (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Specific identifiable device, circuit, or system

With specific source of supply or bias voltage

Reexamination Certificate

active

07830199

ABSTRACT:
A circuit includes an NMOS transistor having a drain and a source, a p-well containing the drain and the source, an n-well under the p-well, and a first well switch configured to selectively connect the n-well to a predetermined voltage in response to an enable phase of a first switching signal. The first well switch can be configured to connect the n-well to the predetermined voltage during the enable phase of the first switching signal and to electrically float the n-well during a non-enable phase of the first switching signal.

REFERENCES:
patent: 6038116 (2000-03-01), Holberg et al.
patent: 6137153 (2000-10-01), Le et al.
patent: 6194952 (2001-02-01), Shigehara
patent: 6356137 (2002-03-01), Roohparvar et al.
patent: 6501325 (2002-12-01), Meng
patent: 2001/0038552 (2001-11-01), Ishimaru
PCT International Search Report and Written Opinion for PCT/US2009/046863 mailed on Jul. 30, 2009.

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