Method of manufacturing a semiconductor device having a...

Semiconductor device manufacturing: process – Making passive device – Stacked capacitor

Reexamination Certificate

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C438S387000, C257SE21546, C257SE21548, C257SE21645

Reexamination Certificate

active

07811895

ABSTRACT:
A stacked capacitor in a memory cell has a bottom electrode made of a metal or metal compound, a capacitor insulation film and a top electrode made of a metal or a metal compound. The capacitor insulation film includes an aluminum oxide film having a thickness of 2 to 4 nm and in contact with the bottom electrode, and an overlying hafnium oxide film having a thickness of 3 to 6 nm. The stacked capacitor has a higher resistance against a biased temperature test.

REFERENCES:
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patent: 2003/0148581 (2003-08-01), Kim et al.
patent: 2004/0071879 (2004-04-01), Callegari et al.
patent: 2004/0106252 (2004-06-01), Jeong et al.
patent: 2004/0137678 (2004-07-01), Cho et al.
patent: 2006/0086961 (2006-04-01), Iijima et al.
patent: 2000-012796 (2000-01-01), None
patent: 2002-373945 (2002-12-01), None
patent: 2004-214602 (2004-07-01), None
patent: 2004-311937 (2004-11-01), None
Japanese Patent Office issued a Japanese Office Action dated Jan. 7, 2010, Application No. 2004-330715.

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