Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
2005-01-18
2009-06-02
Lewis, David L (Department: 2629)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C377S064000, C377S077000
Reexamination Certificate
active
07542023
ABSTRACT:
A shift register includes M (M is an integer larger than two) stages of transfer elements and a control circuit. The M stages of the transfer elements transfer N (M>N, N is an integer larger than one) data signals sequentially input within one cycle. To the control circuit, N clock signals and a control signal are input within the one cycle and the control circuit supplies a shift clock signal to N stages of the transfer elements among the M stages of the transfer elements and supplies a skip fixed logic signal to (M−N) stages of the transfer elements among the M stages of the transfer elements based on the control signal.
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Harness & Dickey & Pierce P.L.C.
Lewis David L
Seiko Epson Corporation
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