Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed
Reexamination Certificate
2005-03-11
2009-12-29
Bullock, Jr., Lewis A (Department: 2193)
Electrical computers: arithmetic processing and calculating
Electrical digital calculating computer
Particular function performed
Reexamination Certificate
active
07640286
ABSTRACT:
A data processing apparatus and method are provided for multiplying first and second n-bit significands of first and second floating point operands to produce an n-bit result. The data processing apparatus comprises multiplier logic for multiplying the first and second n-bit significands to produce a pair of 2n-bit vectors, and sum logic operable to perform a sum operation to add a first set of bits of each of the pair of 2n-bits vectors. Sticky determination logic is also provided for determining from a second set of bits of each of the pair of 2n-bit vectors a sticky value, and selector logic is then used to derive the n-bit result from the output of the sum logic with reference to the sticky value. The sticky determination logic comprises a half-adder structure operable to generate carry and sum vectors from a negated version of the second set of bits of each the pair of 2n-bit vectors, and combination logic for performing a logical XOR operation on the carry and sum vectors with the least significant carry bit set to a logic one value. The sticky value can then be derived from the output of the combination logic. This provides a particularly efficient technique for determining the sticky value without awaiting the production of the final product in non-redundant form.
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Hinds Christopher Neal
Lutz David Raymond
ARM Limited
Bullock, Jr. Lewis A
Nixon & Vanderhye P.C.
Yaary Michael
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