Semiconductor wafer assemblies

Details Semiconductor wafer assemblies Semiconductor wafer assemblies

2006-04-27

2009-02-10

Thai, Luan C (Department: 2891)

Active solid-state devices (e.g., transistors, solid-state diode

With means to control surface effects

Insulating coating

C257S619000, C257S638000, C257S618000, C257S629000, C257S632000

Reexamination Certificate

active

07489020

ABSTRACT:
An elevated containment structure in the shape of a wafer edge ring surrounding a surface of a semiconductor wafer is disclosed, as well as methods of forming and using such a structure. In one embodiment, a wafer edge ring is formed using a stereolithography (STL) process. In another embodiment, a wafer edge ring is formed with a spin coating apparatus provided with a wafer edge exposure (WEE) system. In further embodiments, a wafer edge ring is used to contain a liquid over a wafer active surface during a processing operation. In one embodiment, the wafer edge ring contains a liquid having a higher refractive index than air while exposing a photoresist on the wafer by immersion lithography. In another embodiment, the wafer edge ring contains a curable liquid material while forming a chip scale package (CSP) sealing layer on the wafer.

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