Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2007-04-24
2009-10-20
Nguyen, Tuan T (Department: 2824)
Static information storage and retrieval
Floating gate
Particular connection
C365S185180, C365S185220
Reexamination Certificate
active
07606072
ABSTRACT:
A source line bias error caused by a voltage drop in a source line of a non-volatile memory device during a read or verify operation is addressed. In one approach, a body bias is applied to a substrate of the non-volatile memory device by coupling the substrate to a source voltage or a voltage which is a function of the source voltage. In another approach, a control gate voltage and/or drain voltage, e.g., bit line voltage, are compensated by referencing them to a voltage which is based on the source voltage instead of to ground. Various combinations of these approaches can be used as well. During other operations, such as programming, erase-verify and sensing of negative threshold voltages, the source line bias error is not present, so there is no need for a bias or compensation. A forward body bias can also be compensated.
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Lee Seungpil
Mokhlesi Nima
Mui Man Lung
Nguyen Hao Thai
Sekar Deepak Chandra
Nguyen Hien N
Nguyen Tuan T
SanDisk Corporation
Vierra Magen Marcus & DeNiro LLP
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