Semiconductor memory, memory controller and control method...

Static information storage and retrieval – Addressing – Sync/clocking

Reexamination Certificate

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C365S193000, C365S222000

Reexamination Certificate

active

07599244

ABSTRACT:
A semiconductor memory for inputting and outputting data synchronously with a clock includes a clock reception unit for receiving the clock, and a command reception unit for initially receiving a first specific command synchronizing with the clock after turning a power on, after a low-power standby or after an initialization, followed by starting a command reception.

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patent: 6222785 (2001-04-01), Leung
patent: 2001/0038565 (2001-11-01), Matsuzaki
patent: 2002/0018394 (2002-02-01), Takahashi
patent: 2003/0053362 (2003-03-01), Kawaguchi et al.
patent: 2003/0126356 (2003-07-01), Gustavson et al.
patent: 2004/0081012 (2004-04-01), Setogawa
patent: 2005/0265086 (2005-12-01), Takano et al.
patent: 2006/0164894 (2006-07-01), Wan et al.
patent: 11-149771 (1999-06-01), None
patent: 2003-168292 (2003-06-01), None
patent: WO 00/20954 (2000-04-01), None
European Official Communication dated Feb. 12, 2008, 3 pages.

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