Method and apparatus for adaptively establishing a sampling...

Pulse or digital communications – Equalizers – Automatic

Reexamination Certificate

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C375S355000

Reexamination Certificate

active

07606301

ABSTRACT:
Methods and apparatus are provided for adaptively establishing the optimal sampling phase offset for a DFE operation. According to one aspect of the invention, one or more values in an amplitude domain are converted into a time domain, for example, using a phase detector, based on phase information to provide said sampling phase. The values in the amplitude domain optionally comprise one or more of detected DFE data, ŷ(n) and a sign of an error term for detected DFE data. The sampling phase can establish the phase of an independent clock or an offset to a second clock, such as a clock recovered from a received signal by a clock and data recovery (CDR) circuit.

REFERENCES:
patent: 5724397 (1998-03-01), Torsti
patent: 7184477 (2007-02-01), Haunstein et al.
Stojanovic et al., “Autonomous Dual-Mode (PAM2/4) Serial Link Transceiver with Adaptive Equalization and Data Recovery,” IEEE Journal of Solid-State Circuits, vol. 40, No. 4, pp. 1012-1026 (Apr. 2005).

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