Method of forming a shallow trench isolation region

Details Method of forming a shallow trench isolation region Method of forming a shallow trench isolation region

1997-01-27

1999-06-15

Fourson, George

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438561, 438563, H01L 2176

Patent

active

059131322

ABSTRACT:
A method of making a shallow trench isolation region includes providing a silicon substrate. A pad oxide layer is formed over the silicon substrate. A silicon nitride layer is formed over the pad oxide layer. The silicon nitride layer and the pad oxide layer are patterned, and a trench is thus formed in the silicon substrate. A side-wall oxide layer is formed on a surface of the silicon substrate within the trench. A doped oxide layer is formed over the silicon nitride layer and within the trench. A portion of the doped oxide layer is removed to expose the silicon nitride layer. The silicon nitride layer is removed. The pad oxide layer is removed. A sacrificial oxide layer is formed over the silicon substrate. A well is formed in the silicon substrate. The sacrificial oxide layer is removed. A gate oxide layer is formed over the silicon substrate. A polysilicon layer is formed over the silicon substrate. The polysilicon layer is patterned to form a polysilicon gate.

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