Electrical computers and digital processing systems: processing – Processing architecture
Reexamination Certificate
2007-01-08
2009-08-04
Treat, William M (Department: 2181)
Electrical computers and digital processing systems: processing
Processing architecture
C712S010000, C712S016000, C712S200000, C712S208000
Reexamination Certificate
active
07571300
ABSTRACT:
A memory system includes a plurality of memory blocks, each having a dedicated local arithmetic logic unit (ALU). A data value having a plurality of bytes is stored such that each of the bytes is stored in a corresponding one of the memory blocks. In a read-modify-write operation, each byte of the data value is read from the corresponding memory block, and is provided to the corresponding ALU. Similarly, each byte of a modify data value is provided to a corresponding ALU on a memory data bus. Each ALU combines the read byte with the modify byte to create a write byte. Because the write bytes are all generated locally within the ALUs, long signal delay paths are avoided. Each ALU also generates two possible carry bits in parallel, and then uses the actual received carry bit to select from the two possible carry bits.
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Pavan R. Mula, Modular CMOS ALU Control Unit, Masters Thesis in Electrical Engineering, Texas Tech University, Aug. 1999.
Bever Hoffman & Harms
Integrated Device Technologies, Inc.
Treat William M
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