Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Multiple housings
Reexamination Certificate
2007-03-28
2009-12-29
Potter, Roy K (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Multiple housings
C257S774000, C257SE23011
Reexamination Certificate
active
07638869
ABSTRACT:
A semiconductor device having a stacked arrangement of a substrate and a first chip and a second chip is disclosed. In one embodiment, the first chip is arranged with a lower face on an upper face of the substrate; the second chip with a lower face on an upper face of the first chip, whereby a partial area of the upper face of the first chip that is adjacent to an edge of the first chip is uncovered by the second chip; a fifth wire contact pad is arranged on the uncovered area of the upper face of the first chip; a first bonding wire is arranged that is connected with a first wire contact pad of the substrate and the fifth wire contact pad of the first chip.
REFERENCES:
patent: 6400008 (2002-06-01), Farnworth
patent: 7224070 (2007-05-01), Yang
Irsigler Roland
Luyken Richard Johannes
Niepelt Carsten
Ruckerbauer Hermann
Wood Steve
Dicke Billig & Czaja, PLLC
Potter Roy K
Qimonda AG
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