Dicing technique for flip-chip USP wafers

Details Dicing technique for flip-chip USP wafers Dicing technique for flip-chip USP wafers

2006-12-22

2009-02-17

Dang, Trung (Department: 2892)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S113000, C438S127000

Reexamination Certificate

active

07491581

ABSTRACT:
A method and a fused compound wafer including at least one first MEMS sensor and at least second MEMS sensor includes a first wafer. The first wafer includes at least one first MEMS sensor first subassembly and at least one second MEMS sensor first subassembly. A second wafer includes at least one first MEMS sensor second subassembly, at least one second MEMS sensor second assembly, and a fusing matrix. The fusing matrix includes a first joint configured to encapsulate each of the at least one first MEMS sensor first assembly and each of the at least one first MEMS sensor second assembly forming each at least one first MEMS sensor. A second joint is configured to encapsulate each of the at least one second MEMS first subassembly and each of the at least one second MEMS second subassembly forming each at least one second MEMS sensor.

REFERENCES:
patent: 6822326 (2004-11-01), Enquist et al.
patent: 7303645 (2007-12-01), Yang et al.
patent: 2005/0006738 (2005-01-01), Schaper et al.
patent: 2007/0001247 (2007-01-01), Patel et al.

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