Inter-connector for use with a partitionable massively parallel

Details Inter-connector for use with a partitionable massively parallel Inter-connector for use with a partitionable massively parallel

1996-01-16

1999-06-15

Kulik, Paul V.

395311, G06F 1580

Patent

active

059130709

ABSTRACT:
Apparatus is described for allocating the resources of a parallel computer. The computer is divided into a plurality of processor arrays, a plurality of host computers are provided, and the host computers and the arrays are interfaced by an interconnection means that can connect any host computer to any one or more of the arrays. A specific connection means comprises a plurality of first multiplexers, one for each array, for writing data from any host computer to any array; a plurality of second multiplexers, one for each host computer, for reading from any array to any host computer; and control means for controlling the multiplexers so as to connect the host computers and arrays as desired by the users. The control means comprises a status register which specifies the connections between the host computers and the processor arrays as specified by the users.

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