Patent
1997-07-25
1999-06-15
Coleman, Eric
395678, G06F 940
Patent
active
059130598
ABSTRACT:
Each of a plurality of processors in a multi-processor system executes a thread. The processor includes an execution unit, a reorder buffer which temporally keeps the execution results by the execution unit, a register which stores the execution results kept in the reorder buffer in-order, and an instruction queue which issues an instruction to be executed by the execution queue to the execution queue, the instruction having gotten data necessary for the execution unit. After a thread generation instruction is issued from a parent thread in the processors, only data generated by an instruction prior to the thread generation instruction is inherited from the parent thread to a child thread.
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Coleman Eric
NEC Corporation
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