Silicon wafer surface defect evaluation method

Details Silicon wafer surface defect evaluation method Silicon wafer surface defect evaluation method

2006-08-25

2009-12-15

Kornakov, Michael (Department: 1792)

Single-crystal, oriented-crystal, and epitaxy growth processes;

Processes of growth from liquid or supercritical state

Having pulling during growth

C117S019000, C117S020000, C324S323000, C324S326000, C324S332000, C324S765010

Reexamination Certificate

active

07632349

ABSTRACT:
There is provided a silicon wafer surface defect evaluation method capable of readily detecting a region where small crystal defects exist, the evaluation method comprising: a rapid heat treatment step of a silicon wafer from a silicon single-crystal ingot in an atmosphere which can nitride silicon at a temperature elevating speed of 10 to 150° C./second from a room temperature to temperatures between not lower than 1170° C. and less than a silicon melting point, holding the silicon wafer at the processing temperature for 1 to 120 seconds and then cooling the silicon wafer to the room temperature at a temperature lowering speed of 10 to 100° C./second; and a step of using a surface photo voltage method to calculate a minority carrier diffusion length on the wafer surface, thereby detecting a region on the wafer surface in which small COP's which cannot be detected at least by a particle counter exist.

REFERENCES:
patent: 4181538 (1980-01-01), Narayan et al.
patent: 4598249 (1986-07-01), Goodman
patent: 5272119 (1993-12-01), Falster
patent: 5369495 (1994-11-01), Lagowski
patent: 5581194 (1994-12-01), Lowell
patent: 5742175 (1998-04-01), Kato et al.
patent: 5742176 (1998-04-01), Kato et al.
patent: 5773989 (1998-06-01), Edelman et al.
patent: 5804981 (1998-09-01), Lowell et al.
patent: 6197606 (2001-03-01), Polignano et al.
patent: 6254672 (2001-07-01), Falster et al.
patent: 6512384 (2003-01-01), Lagowski et al.
patent: 6569691 (2003-05-01), Jastrzebski et al.
patent: 6922067 (2005-07-01), Van et al.
patent: 7147711 (2006-12-01), Tamatsuka et al.
patent: 2001/0025597 (2001-10-01), Falster et al.
patent: 2002/0007779 (2002-01-01), Mule et al.
patent: 2004/0053516 (2004-03-01), Nakada et al.
patent: 2004/0194692 (2004-10-01), Nishikawa et al.
patent: 2005/0103256 (2005-05-01), Sadamitsu et al.
patent: 2006/0130738 (2006-06-01), Kurita et al.
patent: 1256723 (2000-06-01), None
patent: 0898298 (1999-02-01), None
patent: 0 964 443 (1999-12-01), None
patent: 1559812 (2005-08-01), None
patent: 2001-081000 (2001-03-01), None
patent: 2001-217251 (2001-08-01), None
patent: 2001-274167 (2001-10-01), None
patent: 98/45507 (1998-10-01), None
Zoth et al, “A fast, preparation-free method to detection iron in silicon,” J. Appl. Phys. 67 (11), Jun. 1990, pp. 6764-6771.
English language Abstract of JP 2001-217251.
English language Abstract of JP 2001-274167.
Slaoui A et al., “Rapid thermal diffusion of phosphorus into silicon from doped oxide films (solar cell manufacture)”, Proceedings of the Photovoltaic Specialists Conference. Las Vegas, Oct. 7-11, 1991, [Proceedings of the Photovoltaic Specialists Conference], New York, IEEE, US, vol. Conf. 22, Oct. 7, 1991, pp. 445-449, XP010039210, ISBN: 978-0-87942-636-1.
Porrini Et Rossetto, “Influence of thermal history during Czochralski silicon crystal growth on OISF nuclei formation”, Material Science and Engineering, vol. B36, 1996, pp. 162-166, XP002531516.
English abstract of JP 2001-081000, Mar. 27, 2001.

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