Field effect transistor having gate and source regions in recess

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Junction field effect transistor

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Details

257282, 257496, 257618, H01L 2948, H01L 2956, H01L 2964

Patent

active

054499321

ABSTRACT:
A field effect transistor having a gate electrode in a recess includes a gate electrode and a source electrode in the same recess and a drain electrode outside the recess. Therefore, the gate-to-drain breakdown voltage is increased without increasing the source resistance. A method for producing such an FET includes forming a drain electrode on a semiconductor layer; depositing a first insulating film covering the drain electrode; etching a region of the first insulating film and a portion of the semiconductor layer through an aperture in the first insulating film, thereby producing a recess; depositing a metal film for forming a source electrode and a second insulating film in the recess, thereby forming a source electrode covered by the second insulating film; depositing a third insulating film and anisotropically etching the third insulating film, leaving side walls at the source electrode and the recess; depositing and patterning a gate electrode metal film, thereby forming a gate electrode in an aperture of the third insulating film and in the recess. The gate electrode is formed stably at a prescribed position in the recess and the gate length can be shortened by controlling the thickness of the third insulating film.

REFERENCES:
patent: 4893155 (1990-01-01), Ohata
patent: 4984036 (1991-01-01), Sakamoto et al.
patent: 5185534 (1993-02-01), Sakamoto et al.
patent: 5321291 (1994-06-01), Redwine
patent: 5323036 (1994-06-01), Neilson et al.

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