Method for producing a semiconductor-on-insulator structure

Details Method for producing a semiconductor-on-insulator structure Method for producing a semiconductor-on-insulator structure

2007-03-08

2009-11-10

Lindsay, Jr., Walter L (Department: 2812)

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

Subsequent separation into plural bodies

C438S459000, C438S311000, C257SE21568, C257SE21331

Reexamination Certificate

active

07615466

ABSTRACT:
The invention relates to a process of treating a structure for electronics or optoelectronics, wherein the structure that has a substrate, a dielectric layer having a thermal conductivity substantially higher than thermal conductivity of an oxide layer made of an oxide of a semiconductor material, an oxide layer made of an oxide of the semiconductor material, and a thin semiconductor layer made of the semiconductor material. The process includes a heat treatment of the structure in an inert or reducing atmosphere with a temperature and a duration chosen for inciting an amount of oxygen of the second oxide layer to diffuse through the semiconductor layer so that the thickness of the second oxide layer decreases by a determined value. The invention also relates to a process of manufacturing a structure for electronics or optoelectronics applications through the use of this type of heat treatment.

REFERENCES:
patent: 5561303 (1996-10-01), Schrantz et al.
patent: 5936261 (1999-08-01), Ma et al.
patent: 6328796 (2001-12-01), Kub et al.
patent: 7531430 (2009-05-01), Kononchuk
patent: 2003/0064735 (2003-04-01), Spain et al.
patent: 2005/0118789 (2005-06-01), Aga et al.
patent: 2006/0051945 (2006-03-01), Yokokawa et al.
patent: 2006/0154442 (2006-07-01), De Souza et al.
patent: 0 707 338 (1996-04-01), None
patent: 2000-036445 (2000-02-01), None
patent: 2006-049725 (2006-02-01), None
patent: WO 94/15359 (1994-07-01), None
G. K. Celler et al., “Frontiers of Silicon-on-insulator”, Journal of Applied Physics, vol. 93, No. 9, pp. 1-24 (2003).
K.-Y. Ahn et al., “Stability Of Interfacial Oxide Layers During Silicon Wafer Bonding”, Journal of Appl. Phys., vol. 65, No. 2, pp. 561-563 (1989).
Oleg Kononchuk et al., “Internal Dissolution of Buried Oxide in SOI Wafers”, Solid State Phenomena, vol. 131-133, pp. 113-118 (2008).
Jim Sullivan et al., “High Temperature Oxygen Out-Diffusion from the Interfacial SiOx Bond Layer in Direct Silicon Bonded (DSB) Substrates”, IEEE 2006 International SOI Conference.
A. Misiuk et al., “Effect Of High Temperature—Pressure On SOI Structure”, Crystal Engineering, vol. 5, pp. 155-161 (2002).
Zengfeng Di et al., “Fabrication Of Silicon-On-SiO2/Diamondlike-Carbon Dual Insulator Using Ion Cutting And Mitigation Of Self-Heating Effects”, Applied Physics Letters, vol. 88, pp. 142108-1-142108-3 (2006).

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