Process for substrate incorporating component

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor

Reexamination Certificate

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Details

C438S107000, C361S762000, C257SE25013

Reexamination Certificate

active

07608477

ABSTRACT:
In a process for producing the component-embedded substrate, a first electronic component is connected and fixed onto a first electrode pattern with a conductive bonding material, the first electrode pattern being provided on a first supporting layer. A second supporting layer including a second electrode pattern is press-bonded onto the electronic component-fixed surface of the first supporting layer with a first prepreg therebetween to perform transfer. Then, the first supporting layer and the second supporting layer are separated from the first prepreg. After separation, the first prepreg is cured. A second electronic component is connected and fixed onto the back surface of the second electrode pattern with a conductive bonding material. A third supporting layer including a third electrode pattern is press-bonded onto the second electronic component-fixed surface with a second prepreg therebetween to perform transfer. Then, the third supporting layer is separated from the second prepreg, and the second prepreg is cured. In this manner, the prepregs and electrode patterns are sequentially laminated, thereby reducing the connection resistance between laminated electrode patterns or between an electrode pattern and an electronic component.

REFERENCES:
patent: 5877550 (1999-03-01), Suzuki
patent: 6625037 (2003-09-01), Nakatani et al.
patent: 6931725 (2005-08-01), Sugaya et al.
patent: 2005/0118750 (2005-06-01), Baba et al.
patent: 2005/0186768 (2005-08-01), Sugaya et al.
patent: 2002-076637 (2002-03-01), None
patent: 2002-261449 (2002-09-01), None
patent: 2003-133743 (2003-05-01), None
International Search Report for PCT Application No. PCT/JP2004/004380. International filing date Mar. 26, 2004; mailing date Jul. 13, 2004.

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