Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
2006-08-18
2009-10-20
Doan, Theresa T (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S698000, C438S612000
Reexamination Certificate
active
07605463
ABSTRACT:
An interposer includes a substrate made of an inorganic material; a through wiring including conductors embedded in through holes; and an upper wiring and (or)a lower wiring. The through wiring, the upper wiring and the lower wiring are respectively formed on preliminary wiring patterns that are additionally simultaneously or sequentially formed on layers made of an insulating material applied to at least wiring forming parts of the substrate, and are formed with a metal mold itself used for forming the preliminary wiring patterns or layers made of a wiring material applied by a printing operation, a plating operation or a deposition on the preliminary wiring patterns formed on the layers of the insulating material by transferring a fine structure pattern of the metal mold.
REFERENCES:
patent: 6444576 (2002-09-01), Kong
patent: 2001/0007371 (2001-07-01), Kawaguchi
patent: 2006/0001179 (2006-01-01), Fukase et al.
patent: 2000-31345 (2000-01-01), None
Kenji Takahashi et al. “Process Integration of 3D Chip Stack With Vertical Interconnection.”Electronic Components and Technology Conference, 2004, pp. 601-609.
Sunohara Masahiro
Taguchi Yuichi
Doan Theresa T
Drinker Biddle & Reath LLP
Shinko Electric Industries Co. Ltd.
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