Method for fabricating an SOI device

Details Method for fabricating an SOI device Method for fabricating an SOI device

2005-05-20

2008-12-16

Lee, Calvin (Department: 2892)

Semiconductor device manufacturing: process

Making passive device

Resistor

Reexamination Certificate

active

07465639

ABSTRACT:
A method is provided for fabricating a silicon on insulator (SOI) device that includes a silicon substrate, a buried insulator layer overlying the silicon substrate, and a monocrystalline silicon layer overlying the buried insulator layer. The method comprises the steps of forming an MOS capacitor coupled between a first voltage bus and a second voltage bus. The MOS capacitor has a gate electrode material forming a first plate of the MOS capacitor and an impurity doped region in the monocrystalline silicon layer beneath the gate electrode material forming a second plate of the MOS capacitor. The first voltage bus is coupled to the first plate of the capacitor and the second voltage bus is coupled to the second plate of the capacitor. The method further includes forming an electrical discharge path coupling the second plate of the MOS capacitor to the silicon substrate.

REFERENCES:
patent: 4737830 (1988-04-01), Patel et al.
patent: 6387770 (2002-05-01), Roy
patent: 7282404 (2007-10-01), Coolbaugh et al.
patent: 2002/0192919 (2002-12-01), Bothra

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