Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Synchronizing
Reexamination Certificate
2006-06-30
2008-11-04
Cox, Cassandra (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Synchronizing
C365S233110
Reexamination Certificate
active
07446579
ABSTRACT:
A semiconductor memory device has a delay locked loop (DLL) with low power consumption. The semiconductor memory device includes a DLL for receiving an external clock to generate a DLL clock, an idle detector for detecting an idle state in which a command for driving a device is not supplied, and an output controller for controlling the output of the DLL through the idle state whether or not data is output.
REFERENCES:
patent: 6492852 (2002-12-01), Fiscus
patent: 6525988 (2003-02-01), Ryu et al.
patent: 6678206 (2004-01-01), Chu et al.
patent: 6836437 (2004-12-01), Li et al.
patent: 6987699 (2006-01-01), Lee
patent: 7139210 (2006-11-01), Kwack et al.
patent: 2004/0222828 (2004-11-01), Ishikawa
patent: 2005/0242853 (2005-11-01), Kwack et al.
patent: 2004-110906 (2004-04-01), None
patent: 2004-327008 (2004-11-01), None
Cho Ho-Youb
Kim Kyoung-Nam
Cox Cassandra
Hynix / Semiconductor Inc.
McDermott Will & Emery LLP
LandOfFree
Semiconductor memory device having delay locked loop does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Semiconductor memory device having delay locked loop, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Semiconductor memory device having delay locked loop will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4051097