Thin film phototransistor, active matrix substrate using the...

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Amorphous semiconductor material

Reexamination Certificate

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Reexamination Certificate

active

07462863

ABSTRACT:
A gate insulation film (14) and a semiconductor layer (15) are laminated on a gate electrode (13); and a source electrode (17) and a drain electrode (18) are formed on the semiconductor layer (15) by having a predetermined interval between their end portions. Each of the source electrode (17) and the drain electrode (18) includes a superimposition area (17aand18a), and at least one portion of the superimposition area (17aand18a) has translucency. This arrangement realizes improvement of photosensitivity (Ip/Id) without causing complication of wiring layout or manufacturing process.

REFERENCES:
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patent: 2005/0045889 (2005-03-01), Fryer et al.
patent: 2005/0067618 (2005-03-01), Nakajima et al.
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patent: 5-243547 (1993-09-01), None
patent: 6-132510 (1994-05-01), None
patent: 6-140614 (1994-05-01), None
patent: 7-326791 (1995-12-01), None
International Preliminary Examination Report mailed Jan. 22, 2004 in corresponding PCT Application No. PCT/JP03/008509.
International Search Report mailed Oct. 7, 2003 in corresponding PCT Application No. PCT/JP03/008509.

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