Scalable flow virtual learning neurocomputer

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395 11, 395800, G06F 1500

Patent

active

053296117

ABSTRACT:
A scalable flow virtual learning neurocomputer system and appratus with a scalable hybrid control flow/data flow employing a group partitioning algorithm, and a scalable virtual learning architecture, synapse processor architecture mapping, inner square folding and array separation, with capability of back propagation for virtual learning. The group partitioning algorithm creates a common building block of synapse processors containing their own external memory. The processor groups are used to create a general purpose virtual learning machine which maintains complete connectivity with high performance. The synapse processor group allows a system to be scalable in virtual size and direct execution capabilities. Internal to the processor group, the synapse processors are designed as a hybrid control flow/data flow architecture with external memory access and reduced synchronization problems.

REFERENCES:
patent: 4796199 (1989-01-01), Hammerstrom et al.
"Parallel Distributed Processing" Rumelhart et al., vol. 1 MIT Press 1986, Foundations Cambridge, Mass.
"Neurons with Graded Response Have Collective . . . " Hopefield Proceedings of the Nat'l Acad. of Sci. 81, pp. 3088-3092, May 1984, Digital Computer System Principles, H. Hellerman, McGraw-Hill Book Company, pp. 346-348.

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