Carrier structure stacking system and method

Details Carrier structure stacking system and method Carrier structure stacking system and method

2006-06-14

2008-11-04

Clark, Jasmine J (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

Multiple housings

C257S685000, C257S674000, C257S690000, C257S693000, C257SE23039, C257SE25006, C257SE25013, C257SE23018, C257SE23021, C257SE23027, C257SE25029, C361S760000, C361S767000, C361S808000, C174S260000, C174S261000

Reexamination Certificate

active

07446403

ABSTRACT:
The present invention provides a system and method for selectively stacking and interconnecting leaded packaged integrated circuit devices with connections between the feet of leads of an upper IC and the upper shoulder of leads of a lower IC while conductive transits that implement stacking-related intra-stack connections between the constituent ICs are implemented in multi-layer interposers or carrier structures oriented along the leaded sides of the stack, with selected ones of the conductive transits electrically interconnected with other selected ones of the conductive transits.

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