Method of and circuit for deskewing clock signals in an...

Details Method of and circuit for deskewing clock signals in an... Method of and circuit for deskewing clock signals in an...

2005-08-05

2008-11-18

Donovan, Lincoln (Department: 2816)

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Synchronizing

C327S149000, C327S158000

Reexamination Certificate

active

07453297

ABSTRACT:
The methods and circuits of the various embodiments of the present invention relate to deskewing a generated clock signal. According to one embodiment, a method of deskewing a clock signal in a circuit having a delay line comprises steps of measuring an intrinsic delay in a delay line; aligning the frequency of a generated clock signal with the frequency of a reference clock signal; and aligning the phase of the generated clock signal and the reference clock signal using the measured intrinsic delay. According to another embodiment, a circuit for deskewing a clock signal in a circuit having a delay line is also described.

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U.S. Appl. No. 11/015,674, Kaviani filed Dec. 17, 2004, entitled Method of and Circuit for Deskewing clock Signals in an Integrated Circuit, Xilinx, Inc, 2100 Logic Drive, San Jose, CA 95124.

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