Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2008-01-09
2008-10-07
Potter, Roy K (Department: 2822)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S107000, C438S109000
Reexamination Certificate
active
07432128
ABSTRACT:
A method of fabricating a semiconductor device is provided. The semiconductor device has four levels of semiconductor chips stacked on a die pad of a lead frame. Specifically, the first, second, third and fourth semiconductor chips are stacked in turn. The first semiconductor chip shifts from the second semiconductor chip, and the third semiconductor chip shifts from the fourth semiconductor chip. An insulation spacer is placed between the second and third semiconductor chips. The four semiconductor chips are located within the confinement of the die pad. The semiconductor chips, spacer and die pad are sealed in with resin sealing material. Signals are transmitted between the upper semiconductor chip (second semiconductor chip or fourth semiconductor chip) and the lower semiconductor chip (first semiconductor chip or third semiconductor chip) via a plurality of electrode pads connected by wires. Preferably, the first sides, which are the edges of the second and third semiconductor chips, overlap when viewed from the top.
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Oki Electric Industry Co. Ltd.
Potter Roy K
Rabin & Berdo PC
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