Sampling rate converting method and circuit

Coded data generation or conversion – Digital code to digital code converters – Data rate conversion

Reexamination Certificate

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C341S050000, C348S485000

Reexamination Certificate

active

07411525

ABSTRACT:
A sampling rate converting circuit receives plural pieces of input data having different sampling frequencies. A plurality of FIR circuits is shared to reduce a circuit area, and, in a case where a magnification ratio of an input frequency and an output frequency is not an integer, signal deterioration due to resampling is solved. An oversampling component performs oversampling on input data Fs1and outputs output data Fs′. An input timing timer calculates an input/input time based on an input timing signal CK1. An output timing timer and an accumulator calculate an input/output time based on an output timing signal CK′ and the input timing signal CK1and multiplies the input/output time by an oversampling multiple W to obtain a multiplied result. A divider divides the multiplied result by the input/input time to obtain a sampling position. A coefficient generator generates a filter coefficient based on the sampling position and supplies the filter coefficient to a multiplier.

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patent: 6714529 (2004-03-01), Tanabe et al.
patent: 2005/0156645 (2005-07-01), Hirano
patent: 2006/0045212 (2006-03-01), Ishii et al.
patent: 2006/0182209 (2006-08-01), Coyne et al.
patent: 5-327409 (1993-12-01), None

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