Semiconductor process for forming stress absorbent shallow...

Details Semiconductor process for forming stress absorbent shallow... Semiconductor process for forming stress absorbent shallow...

2004-11-22

2008-10-28

Smith, Bradley K (Department: 2891)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

C438S435000, C257SE21546

Reexamination Certificate

active

07442621

ABSTRACT:
A semiconductor fabrication process includes patterning a hard mask over a semiconductor substrate to expose an isolation region and forming a trench in the isolation region. A flowable dielectric is deposited in the trench to partially fill the trench and a capping dielectric is deposited overlying the first oxide to fill the trench. The substrate may be a silicon on insulator (SOI) substrate including a buried oxide (BOX) layer and the trench may extend partially into the BOX layer. The flowable dielectric may be a spin deposited flowable oxide or a CVD BPSG oxide. The flowable dielectric isolation structure provides a buffer that prevents stress induced on one side of the isolation structure from creating stress on the other side of the structure. Thus, for example, compressive stress created by forming silicon germanium on silicon in PMOS regions does not create compressive stress in NMOS regions.

REFERENCES:
patent: 6621131 (2003-09-01), Murthy et al.
patent: 2004/0029375 (2004-02-01), Lee et al.
patent: 2004/0192009 (2004-09-01), Belyansky et al.
patent: 2005/0095872 (2005-05-01), Belyansky et al.
Yin, H. et al.; Strain relaxation of SiGe islands on compliant oxide, J. Appl. Phys. 91(12), 9716, 2002.
Chung, Sung-Woong et al.; Novel shallow trench isolation process using flowable oxide CVD for sub-100nm DRAM, IEDM p. 233, IEEE 2002.
Huang, R. et al.; Relaxation of a strained elastic film on a viscous layer, Mat. Res. Soc. Symp. vol. 695, p. L3.14.1, 2002.
Yin, H. et al.; Strain partition of Si/SiGe and SiO2/SiGe on compliant substrates, Appl. Phys. Lett. 82(22), 3853, 2003.

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