Method of forming a vertical MOS transistor

Details Method of forming a vertical MOS transistor Method of forming a vertical MOS transistor

2007-07-27

2008-10-14

Lebentritt, Michael S (Department: 2829)

Semiconductor device manufacturing: process

Making regenerative-type switching device

Having field effect structure

C438S134000, C438S246000, C438S259000, C438S268000, C438S270000, C257SE21149, C257SE21151, C257SE21384, C257SE21444, C257SE21629, C257SE29131, C257SE29165, C257SE21201, C257SE21214

Reexamination Certificate

active

07435628

ABSTRACT:
A vertical MOS transistor has a source region, a channel region, and a drain region that are vertically stacked, and a trench that extends from the top surface of the drain region through the drain region, the channel region, and partially into the source region. The vertical MOS transistor also has an insulation layer that lines the trench, and a conductive gate region that contacts the insulation layer to fill up the trench.

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