Electrical computers and digital processing systems: processing – Dynamic instruction dependency checking – monitoring or... – Commitment control or register bypass
Reexamination Certificate
2001-05-14
2008-09-09
Pan, Daniel (Department: 2183)
Electrical computers and digital processing systems: processing
Dynamic instruction dependency checking, monitoring or...
Commitment control or register bypass
C712S206000
Reexamination Certificate
active
07424598
ABSTRACT:
The data processor for executing, instructions realized by wired logic, by a pipeline system, includes a plurality of instruction registers, and arithmetic operation units of the same number. A plurality of instructions read in the instruction registers in one machine cycle at a time are processed in parallel by the plurality of arithmetic operation units.
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Hotta Takashi
Maejima Hideo
Tanaka Shigeya
Mattingly ,Stanger ,Malur & Brundidge, P.C.
Pan Daniel
Renesas Technology Corp.
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