Circuit arrangement for the temporary storage of instruction wor

Details Circuit arrangement for the temporary storage of instruction wor Circuit arrangement for the temporary storage of instruction wor

1984-02-17

1986-08-19

Zache, Raulfe B.

Boots, shoes, and leggings

G06F 906

Patent

active

046073299

ABSTRACT:
For the temporary storage of instruction words read out of an instruction memory, an arrangement is used of one of a plurality of buffer memories (20 to 23) which are addressed for writing in and for reading out by a cyclically operating write counter (26) and a cyclically operating read counter (27). A monitoring circuit (28) controlling both counters (26,27) prevents the write counter (26) from overtaking the read counter (27).

REFERENCES:
patent: 4079455 (1978-03-01), Ozga
patent: 4255785 (1981-03-01), Chamberlin

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