Circuit for finding m modulo n

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G06F 738

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active

057936609

ABSTRACT:
A circuit that finds m mod n may be obtained by creating the trial differences m-n, m-2n, m-3n, m-4n . . . , up to a limit determined by the sizes of m and n. The trial differences thus produced are examined in the order given to find the last one thereof that is non-negative. This examination involves only sign bits and a priority encoder. The magnitude portions of the various trial differences are applied as inputs to a first MUX whose selection is controlled by the priority encoder. The trial difference selected by the first MUX is applied as an input to a second MUX, whose other inputs are m itself, and zero. A separate initial comparison is performed between m and n, and controls what appears at the output of the second MUX. If n>m then the value of m appears at the output of the second MUX; if n=m or n=1 then zero appears; otherwise, m >n and it is the output from the first MUX that appears as the output of the second MUX. The output of the second MUX is m mod n. It can be shown that when m and n are powers of two (m=2.sup.u, n=2.sup.v), the most general case of interest is one where u.gtoreq.v, and that for such cases the number of trial differences that need to be formed is at most 2.sup.(u-1) -1.

REFERENCES:
patent: 4538237 (1985-08-01), Circello
patent: 4598266 (1986-07-01), Bernardson
patent: 4949243 (1990-08-01), Kawamura et al.
patent: 5724279 (1998-03-01), Benoloh et al.

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