Static information storage and retrieval – Floating gate – Particular connection
Reexamination Certificate
2008-07-01
2008-07-01
Mai, Son L (Department: 2827)
Static information storage and retrieval
Floating gate
Particular connection
C365S189050, C365S200000
Reexamination Certificate
active
11389655
ABSTRACT:
A memory has defective locations in its user portion replaceable by redundant locations in a redundant portion. Data latches in the user and redundant portions allow data sensed from or to be written to a memory to be exchanged with a data bus. A defective location latching redundancy scheme assumes the column circuits including data latches for defective columns to be still useable. The data latches for the defective columns are used to buffer corresponding redundant data that are normally accessible from their data latches in the redundant portion. In this way both the user and redundant data are available from the user data latches, and streaming data into or out of the data bus is simplified and performance improved.
REFERENCES:
patent: 4281389 (1981-07-01), Smith
patent: 4281398 (1981-07-01), McKenny et al.
patent: 5070032 (1991-12-01), Yuan et al.
patent: 5095344 (1992-03-01), Harari
patent: 5172338 (1992-12-01), Mehrotra et al.
patent: 5200959 (1993-04-01), Gross et al.
patent: 5231604 (1993-07-01), Watanabe
patent: 5313421 (1994-05-01), Guterman et al.
patent: 5315541 (1994-05-01), Harari et al.
patent: 5343063 (1994-08-01), Yuan et al.
patent: 5418752 (1995-05-01), Harari et al.
patent: 5428621 (1995-06-01), Mehrotra et al.
patent: 5570315 (1996-10-01), Tanaka et al.
patent: 5595924 (1997-01-01), Yuan et al.
patent: 5602987 (1997-02-01), Harari et al.
patent: 5661053 (1997-08-01), Yuan
patent: 5768192 (1998-06-01), Eitan
patent: 5774397 (1998-06-01), Endoh et al.
patent: 5808946 (1998-09-01), Roohparvar
patent: 5903495 (1999-05-01), Takeuchi et al.
patent: 6011725 (2000-01-01), Eitan
patent: 6046935 (2000-04-01), Takeuchi et al.
patent: 6104646 (2000-08-01), Haga
patent: 6149316 (2000-11-01), Harari et al.
patent: 6172916 (2001-01-01), Ooishi
patent: 6201744 (2001-03-01), Takahashi
patent: 6222762 (2001-04-01), Guterman et al.
patent: 6462994 (2002-10-01), Kim
patent: 6556479 (2003-04-01), Makuta et al.
patent: 6661706 (2003-12-01), Kawai et al.
patent: 6684345 (2004-01-01), Harari et al.
patent: 6816420 (2004-11-01), Liu et al.
patent: 6868021 (2005-03-01), Tanabe et al.
patent: 6891753 (2005-05-01), Cernea
patent: 7224605 (2007-05-01), Moogat et al.
patent: 7324389 (2008-01-01), Cernea
patent: 2002/0044489 (2002-04-01), Kim
patent: 2004/0062096 (2004-04-01), Tanabe et al.
patent: 2005/0141387 (2005-06-01), Cernea et al.
patent: 2006/0140007 (2006-06-01), Cernea et al.
patent: 2007/0220935 (2007-09-01), Cernea
patent: 2007/0223291 (2007-09-01), Cernea
patent: 0 430 682 (1991-06-01), None
Eitan et al., “NROM: A Novel Localized Trapping, 2-Bit Nonvolatile Memory Cell,” IEEE Electron Device Letters, vol. 21, No. 11, Nov. 2000, pp. 543-545.
USPTO, “Notice of Allowance and Fee(s) Due,” mailed in related U.S. Appl. No. 11/388,408 on Apr. 13, 2007, 8 pages.
EPO/ISA, “Notification of Transmittal of the International Search Report and the Written Opinion of the International Searching Authority, or the Declaration,” mailed in related International Patent Application No. PCT/US2007/063863 on Sep. 14, 2007, 12 pages.
Cernea Raul-Adrian
Moogat Farookh
Tsao Shouchang
Tseng Tai-Yuan
Davis , Wright, Tremaine, LLP
Mai Son L
Sandisk Corporation
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