Electrostatic discharge protection circuit

Electricity: electrical systems and devices – Safety and protection of systems and devices – Load shunting by fault responsive means

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361 91, 361111, H02H 900

Patent

active

057935882

ABSTRACT:
A circuit for protecting against damage from an electrostatic discharge (ESD). The circuit provides protection by minimizing a voltage difference between a main voltage line and a TTL voltage line. This is accomplished with a bypass to a main ground voltage line in the case of a positive overvoltage, and a bypass to a main supply voltage line in the case of a negative overvoltage. In order to equalize the voltage between the main supply voltage line and the TTL supply voltage line, the circuit also utilizes a metal gate N-channel field transistor and a gate diode active transistor connected in parallel between the main and TTL supply voltage lines. A pair of metal gate N-channel field transistors is also connected in parallel between the main and TTL ground voltage lines in order to equalize the voltage between the main and TTL ground voltage lines.

REFERENCES:
patent: 5034845 (1991-07-01), Murakami
patent: 5311083 (1994-05-01), Wanlass
patent: 5343352 (1994-08-01), Nagamine
patent: 5450267 (1995-09-01), Diaz et al.
patent: 5515232 (1996-05-01), Fukazawa et al.

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