Metal working – Method of mechanical manufacture – Assembling or joining
Patent
1980-09-16
1982-09-28
Rutledge, L. DeWayne
Metal working
Method of mechanical manufacture
Assembling or joining
29571, 29578, 29579, 29580, 148174, 156644, 156653, 156657, 156662, 357 24, 357 59, H01L 2120, H01L 21283
Patent
active
043511007
ABSTRACT:
In an exemplary embodiment, a first polysilicon layer is provided with a SiO.sub.2 mask, and the first polysilicon layer is etched away under the SiO.sub.2 mask to produce SiO.sub.2 overhangs of a lateral extent corresponding to about twice the edge position error (.sup..+-. s). Then when second polysilicon layers are produced by means of chemical vapor deposition (CVD), to occupy the cavities under the SiO.sub.2 overhangs, the desired nonoverlapping poly-Si-2 electrodes result after definition of those poly-Si-2 electrodes by known lithographical techniques.
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patent: 3941630 (1976-03-01), Larrabee
patent: 4035906 (1977-07-01), Tasch et al.
patent: 4055885 (1977-11-01), Takemoto
patent: 4141765 (1979-02-01), Druminski et al.
patent: 4178396 (1979-12-01), Okano et al.
patent: 4240196 (1980-12-01), Jacobs et al.
Browne et al., "Nonoverlapping Gate Charge-Coupling . . . Applications", IEEE J. Solid-State Circuits, vol. SC 11, No. 1, Feb. 1976, pp. 203-207.
Rutledge L. Dewayne
Saba W. G.
Siemens Aktiengesellschaft
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