NAND type non-volatile memory device and method of forming...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185240

Reexamination Certificate

active

11646164

ABSTRACT:
A NAND type non-volatile memory device and a method for forming the same. Well bias lines are disposed substantially parallel to other wiring lines at equal intervals. Active regions that are electrically connected to the well bias line are disposed substantially parallel to other active regions at the same equal intervals. As a result, continuity and repeatability in patterns may be maintained and pattern defects may be minimized or prevented.

REFERENCES:
patent: 6850439 (2005-02-01), Tanaka
patent: 2007/0002627 (2007-01-01), Youn
patent: 2007/0297233 (2007-12-01), Maejima
patent: 1999 012155 (1999-02-01), None
patent: 1999 0031469 (1999-05-01), None
patent: 11284155 (1999-10-01), None
patent: 1020030057712 (2003-07-01), None
patent: 1020050067504 (2005-07-01), None
patent: 1020050076115 (2005-07-01), None
patent: 1020060072688 (2006-06-01), None
English Abstract for Publication No.: 1999-012155.
English Abstract for Publication No.: 1999-0031469.
English Abstract for Publication No.: 11-284155.
English Abstract for Publication No.: 1020030057712.
English Abstract for Publication No.: 1020050067504.
English Abstract for Publication No.: 1020050076115.
English Abstract for Publication No.: 1020060072688.

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