Nonvolatile semiconductor memory device with memory cells,...

Details Nonvolatile semiconductor memory device with memory cells,... Nonvolatile semiconductor memory device with memory cells,...

2008-03-04

2008-03-04

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185270

Reexamination Certificate

active

11248303

ABSTRACT:
A semiconductor device comprises a memory cell array and a source line driver. Each of the memory cells in the memory cell array has a floating gate cell transistor which stores data by accumulating charge in the floating gate and a select gate transistor whose drain is connected to the source of the cell transistor and whose source is connected to a source line. The source line driver is configured so as to drive the source line in a write operation at a potential between the substrate bias potential of the cell transistor and select gate transistor and the ground potential.

REFERENCES:
patent: 5923585 (1999-07-01), Wong et al.
patent: 6961268 (2005-11-01), Umezawa
patent: 2004/0080981 (2004-04-01), Yoshida
U.S. Appl. No. 11/244,287, filed Oct. 6, 2005, Shuto.
Ton Ditewig, et al. “An Embedded 1.2V-Read Flash Memory Module in a 0.18μm Logic Process”; 2001 IEEE International Solid-State Circuits Conference, Digest of Technical Papers; Feb. 5, 2001; pp. 34-35, 425.

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