Shallow trench isolation method

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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C438S424000, C257SE21551, C257SE21540

Reexamination Certificate

active

10899663

ABSTRACT:
A method (200) of forming an isolation structure is presented, in which a hard mask layer (304, 308) is formed (204, 206) over the isolation and active regions (305, 303) of a semiconductor body (306), and a dopant is selectively provided to a portion of the active region (303) proximate the isolation region (305) to create a threshold voltage compensation region (318). After the compensation region (318) is created, the hard mask layer (304, 308) is patterned (218) to create a patterned hard mask. The patterned hard mask is then used in forming (222) a trench (323) in the isolation region (305) near the compensation region (318), and the trench (323) is then filled (224) with a dielectric material (338).

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