Dual damascene interconnect structure with improved electro...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

Reexamination Certificate

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Details

C257S776000

Reexamination Certificate

active

11090107

ABSTRACT:
A dual damascene interconnect structure is formed by patterning a first dielectric to form a metal line. A second dielectric is disposed on the first dielectric and patterned to form a via. The first metal line is patterned in a configuration relative to a via landing so that a cavity is formed when the via etch into the second dielectric is extended into the first dielectric. The cavity is filled with a conductive metal in an integral manner with the formation of the via to form a via projection for improved electrical contact between the via and the metal line.

REFERENCES:
patent: 6207577 (2001-03-01), Wang et al.
patent: 6211063 (2001-04-01), Liu et al.
patent: 6271117 (2001-08-01), Cherng
patent: 6294465 (2001-09-01), Hernandez et al.
patent: 6461955 (2002-10-01), Tsu et al.
patent: 6482733 (2002-11-01), Raaijmakers et al.
patent: 6642146 (2003-11-01), Rozbicki et al.

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